"What we did was extend the life of the second generation platform," said Fruehe. "The last stop on the Socket F route was supposed to be Shanghai. Instead, we added Istanbul, a six-core second-generation design. The fact you get more life out of that platform, from 2006 to 2010, that's an awesome story for customers looking to minimize the churn in their datacenter." Istanbul and Sao Paulo, the 2010 processor design, will both be fully native six-core designs, an easy extension from Barcelona's quad core design. AMD was able to get there faster than had it simply fudged a quad-core design using an MCM, Fruehe argued. And it will be safer course in terms of manufacturing.

We've learned that R700, a dual RV770 product, won't launch alongside with RV770 products. As we've said before, both RV770 are scheduled for late June launch, and it looks like the dual chip card won't launch simultaneously.

We’ve found out that AMD was spending $18 million for Ferrari F1 sponsorship and about $12 million for Nascar. This was Henry Richard’s baby, and since he has gone to Freescale, he will try to convince them to do the same. He simply likes fast cars, this is his thing, as you can see here. As we said the other day, AMD is trying to get itself out of these deals, but due to contract terms they are still bonded and are regularly paying for both Formula 1 and Nascar sponsorships.

The Bladecenter QS22 systems will run Red Hat Enterprise Linux and include IBM's open sauce Eclipse development environment. IBM claims its new QS22 systems can be integrated with x86 based servers in customers' data centers. A 42U rack will hold up 56 QS22 blade servers capable of delivering up to 25.8 teraflops of computing torque.

Everyone is familiar with how Intel, AMD and other chipmakers churn out faster and faster processors. But in the past few years the design of these chips has changed. Instead of making chips faster by making their components smaller and running them at higher speeds, makers have started building multiple processing engines, or “cores”, onto each chip. Each core can run at a lower speed, which requires less energy and produces less heat, and the overall number-crunching power of the chip continues to increase. But this change requires programmers to write code that can split the processing tasks efficiently between the cores. Such “parallel programming” is a classic problem in computer science, but not enough programmers have mastered the necessary techniques. Even so, the chipmakers have no intention of slowing down. Dual-core and four-core chips are already available, and Intel plans to launch six-core chips later this year. Chips with even more cores will follow in 2009.

eChannelLine-AMD bids to bounce back
Ars Techica-AMD tries to hack its way back to the black with job cuts
Channel Web-AMD Shuffles Cards In Bid To Get Back In Black

If you wonder what that AMD/TSMC deal will mean for you, the effects of this tie-up are very simple: TSMC has a massive output capacity. TSMC manufactures more than two thirds of all chips sold by ATI, Nvidia, VIA, Conexant, Marvell, FPGA manufacturers and FPU accelerators. TSMC is considered the world's largest foundry today. Even if AMD puts restrictions on the use of SOI, TSMC is likely to gain experience to develop and enhance its manufacturing technologies with SOI wafers, including lucrative "half-node die shrinks". One of the potential cash cows is the scaling of 45 nm SOI to 40 nm SOI. This also applies to the 32 nm process and its half-node shrink.

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