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Written by Chris Tom
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Friday, 27 June 2008 00:57 |
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Fudo says that DDR3 support will be coming from AMD in Q1 of next year. By then pricing should hopefully drop. To make things a bit more clear, DDR3 part of the chipset is actualyl inside of the CPU but at the same time these "new" chipsets will be matched with socket AM3 that will enable DDR3 and new CPUs to work. Of course, the new DDR3 boards will use exsisting Hypertransport 3 marchitecture.
RD790 DDR3 and RD890 DDR3 should be the first two AMD chipsets, boards based on it, to support DDR3. |
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Written by Chris Tom
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Wednesday, 28 May 2008 00:45 |
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Extreme Tech discusses GDDR5 that AMD will be using with the upcoming Radeon 4870. GDDR5 uses a feature called Clock Data Recovery, where the memory clock speed is actually generated out of the data stream. Upon power-up, a system using GDDR5 memory actually "trains" the interface between the memories and the host device (the graphics chip, in this case). Command and address clocks are synced up, the data clock is derived from the signal on memory reads, the data/address/command clocks are de-skewed to align signals properly. This "training" process helps produce cleaner signaling and is one way the standard achieves high clock rates.
It also makes designs that use GDDR5 more tolerant of different trace wire lengths than GDDR3 or GDDR4. Currently, board designs using high-speed memories are tricky. A lot of care has to be taken to make sure the trace wires are all the same length, so they're a mess of zig-zagging routes. Combine this with the extra wires and board layers required for wider memory busses, and graphics cards get expensive, difficult to build, and prone to failure. The clock training system of GDDR5 should, in theory, help alleviate some of that. |
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Fred Weber Startup Announces High Capacity MetaRAM |
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Written by Chris Tom
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Monday, 25 February 2008 03:26 |
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If you wonder what ex AMD CTO Fred Weber was up to well wonder no longer. EE Times reports that he has a new company, MetaRAM that has announced today a new chip set that can double to quadruple memory capacity. Weber believes as many as 20 percent of the roughly ten million servers that ship a year could be candidates for his memory-expansion technology if they can accommodate DDR2 DRAMs.
"We thought we would have to aim this solely at AMD-based Opteron systems, but halfway through out project Intel told us they were working on a registered DIMM platform," said Weber.
Intel has pushed hard for an alternative to DDR2 it has developed called fully buffered DIMMs. However, some OEMs have pushed back on the technology.
"Many OEM were not happy with the power, cost and latency issues with FB-DIMMs," said Suresh Rajan, the co-founder of MetaRAM who previously helped launch NVidia Corp.'s server chip set business. "One OEM said he had to redesign his whole chassis to accommodate FB-DIMMs," he added. So even Intel is on board. FB DIMMs certainly are Rambus 2.0. |
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Hynix Semiconductor Licenses ISi?s Z-RAM Memory Technology for DRAM Products |
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Written by Chris Tom
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Monday, 13 August 2007 06:52 |
Technology Slashes DRAM Size and Cost Eight-Figure Deal Changes the Face of the DRAM World
SANTA CLARA, Calif. & ICHEON, South Korea--(BUSINESS WIRE)--Innovative Silicon Inc. (ISi), the developer of Z-RAM® high-density memory intellectual property (IP), and Hynix Semiconductor Inc. (KRX:HynixSemi) today announced that Hynix has agreed to license ISi?s Z-RAM for use in its DRAM chips. Z-RAM-based DRAMs will use a single transistor bitcell ? rather than a combination of transistors and capacitor elements ? representing the first fundamental DRAM bitcell change since the invention of the DRAM in the early 1970s. Hynix has received the first-mover opportunity to bring Z-RAM to the DRAM market; and to ensure this advantage, the two companies have committed considerable engineering resources to work side-by-side on the program.
Z-RAM was initially developed as the world?s lowest-cost embedded memory technology for logic-based ICs such as mobile chipsets, microprocessors, networking and other consumer applications. The technology was first licensed, in December 2005, by AMD for upcoming microprocessor designs. Now, the engagement with Hynix positions Z-RAM to become the lowest-cost memory technology in the greater than $30B memory market.
?Z-RAM promises to provide an elegant approach to manufacture dense DRAMs on nanometer processes,? said Sung-Joo Hong, VP of R&D Division at Hynix. ?We see the potential to create a new platform of products based on ISi?s innovation of Z-RAM that will help us maintain and grow our leadership position in the memory market.? |
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