The interesting part is where they go, AMD will put one microbuffer between two DIMM slots, basically making each drive two DIMMs. This will effectively make each RAM channel support twice the number of DIMMs, allowing DDR3 to be a workable server solution. This is also called Buffer on Board (BoB).

The new PC2-5400 Titanium modules were designed exclusively for the AMD AM2 platform and are custom-tailored to the extended column address range of the AM2 memory controller. With a doubled page size, access penalties are reduced to ultimately improve system performance. Used on the AM2 platform, the architecture of these modules is particularly beneficial for large CAD model processing and memory intense graphics applications such as filters in Adobe Photoshop or video processing.

With 11 column address bit support by the AM2 memory controller, the number of addresses in each row or page can be as high as 2048 individual entries for a page size of 16kbit. Unlike modules based on standard 10-bit column address chips with an ?8k? page size, the new Titanium AM2 Special modules take advantage of the AM2 controller?s feature set and provide a single rank solution with 2GB density using ?16k? pages. This allows the controller to stay ?in page? twice as long compared to standard memory architectures, thereby achieving unparalleled performance.