Well! we don't know exactly if Llano has ALL HT links removed.. that is a pretty good guess... but certainly it wasn't to save power.. not really!... it was to "please" OEMs that have all major components on "mobile" platforms certified for PCIe.
The question is if you have to go for PCIe, then put that crap wasting precious SHP space controller on-die, that will save some power of course, compared with putting the crap on the chipset made of older and less efficient processes(Ed)
Time to market!.. AMD could had gone for HT links, but then it would had to design an equivalent "desktop" chipset and certify it for mobile.. it would had been bigger and hotter and more time to develop, specially the north-bridge chipset HUB, because those chipsets are still made on 65nm "bulk" instead of 32nm gate-first HKMG, compared with a chipset HUB which has the major space wasting PCIe controller on the CPU/APU die (Ed)
Mobile is considerably slower in operation.. for Mobile, HT links make little difference, and the big question is configurations with an IGP or a discrete GPU on the same platform. AMD is delivering those discrete GPUs on PCIe interface.. IF and when
those interfaces change to HT, then it will be a complete different story...
So to trump Intel on mobile, the whole strategy is hampered by a crap little thing(PCIe) that so few ppl pay attention to... why is that ?... because if those interfaces of discrete GPU offerings is HT, the best Notebooks would have to have AMD all around (INTEL WILL NEVER TOUCH "hypertransport" BY PROPAGANDA AND CONTROL REASONS(its out of their control).. EVEN IF ITS CLEARLY SUPERIOR
.. that is why Intel rushed so quickly SB out, and lucky because the "bug of rush" was on the chipset not the CPU itself .. that is why GPGPU compute is not exploding (GPGPU on HT makes the most sense), its hold back... that is why "here" we get "shills" talking about "CPU acceleration"
... that is why the agreement with Nvidia, if Intel is blocked in AMD side because of GPGPUs on HT interface, it will go and "spin in-grand" their mobile offerings with Nvidia GPUs instead...Does GPGPU have a bright future? - Blog - StreamComputingOpenCL on the CPU: AVX and SSE - Blog - StreamComputing
Transfer times(latency) play a very important roll in OpenCL.. that is why there is OpenCL on CPUs, and that is why APUs is a winning design.. AND THAT IS WHY HyperTransport MAKES A HELL LOT OF SENSE!( HTX also)Waiting for Mobile OpenCL – Q1 2011 - Blog - StreamComputingSSEx, AVX, FMA and other extensions through OpenCL - Blog - StreamComputing
disruptive indeeddisruptive-technologies.pdf (Objecto application/pdf) AMD between a rock and a hard place!
.. that is the whole question about PCIe vs HT links!... its strategy, not any major technical hurdles. Until AMD frees itself from the straitjacket, it will never be really able to challenge Intel on this crucial segment of mobile.
Zacate was a good development.. it could serve not only for ultramobile/embedded which is aimed at, but it could go much higher above in the food chain... Had it be on an HT link chipset and all things would had been solved.
But OEM pressure demanded PCIe compliance, so that " the spin market" could go for ITX with PCIe slots and then "usual suspect" sites spin comparatives with CLEAR Intel desktop offerings downgraded to the same, to dismay those superior ultramobile AMD offerings.
The solution might be for AMD to push hard GPGPU computing and make mobile chipsets out of 28nm gate-first HKMG "bulk" processes. That would make them small enough(up to 4x smaller than a 65nm similar), power efficient enough and cheap enough... and make the BEST (now its GPGPU with hardware schedulers to) "mobile" discrete GPGPU offerings on HT links FIRST!!!(not discarding PCIe entirely, but the best go for HT interface first, for not helping sell Intel CPUs instead of AMD CPU/APUs)..
On the CPU/APU(CPU+GPU in Intel, not really fusion); side its hard for AMD to establish a superior product, counting the all "rigged tests" and spin that goes around!.. on the GP/GPU side it might be much easier!.. that is why Intel gave Nvidia 1.5B $, more than the 1.2B $ it gave to AMD for settlement(peanuts for them!), for the multi-billions it stole from AMD due to their world wide condemned business practices.
So its not technical.. and in my POV all resolves around this issue of interconnect. I've been ranting about it for years!.. i might stop posting for 2 years, then came back, but if AMD hasn't the "guts" to free itself from the crap, when i re-start posting it would be the same s**t allover...
A good example its that "slide" of "future APU" features
.. why wait for ccPCIe, that will be IF only Intel pleases... and when Intel pleases!... so it might go far far into the future than those planned 4th Phase features time schedule => AMD has no control over it at all!... when with "cache coherent Hypertransport", AMD could put the feature even in the 3th Phase time schedule!.. its really mind boggling !!!??
Does AMD board "HATE" hypertransport !??.. is there an Intel "YURI" sitting down!??... i can't understand!!??... its an easy exercise i think!.. at least me as AMD's CEO, and i can imagine myself sending chocolate boxes to Otellini with nice notes!( he could put them next to the First Billion plaque of stolen shipments!)... Is that the reason why the turmoil at AMD around the CEO place !??... an "yuri" un-catched and its the end of AMD in a long term...
There are rumors.. example... Kitguru says intel is pulling in roadmap thanks to BD
But in my POV, it might not exactly have to do with "Orochi" itself.. alarm bells ringed at Intel when they realized that AMD is not exactly following the "dictatum".. no PCIe links on-die for that!?.. might indicate a "revolution", and a superior Trinity without PCIe as major interconnect, followed by GPGPUs on HT interfaces also.. and Intel might be for a good deal of trouble...( EVEN on MOBILE a direct APU < cache coherent hypertransport > discrete GPGPU, its a whole lot similar to some server/wokstation(HPC) configs of "torrenza"!... and OpenCL makes the whole transparent to developers... so why not scale that all around even to clusters?
Its my impression or Intel has been quiet but now its intensifying the "spin" again.. at least a comparative of a desktop offering with Zacate, its very stupid if anyone ask me!